In a variety of applications, material must be removed from a substrate or other workpiece. First, material is deposited on the substrate or workpiece. Portions of the material may then be removed. Sometimes the material may be removed as a part of the normal process. Other times, the material may be removed because it is undesirably deposited in certain locations.
Along these lines, in damascene chip wiring methods, typically material is deposited over all surfaces in a substrate. The material is then polished to leave only material in desired locations. Among the various processes involved in damascene chip wiring methods, apart from the photolithography step, the chemical mechanical polishing typically is the next most expensive step.
Comparatively high cost associated with demascene chip wiring methods and the apparatus utilized in such methods is typically due mostly to lower throughput. Throughput associated with such methods can range from about 3 wafers per hour for levels with relatively wide wire lines, to as high as 8 wafers per hour for thinner metal lines. Typically, for full damascene BEOL, the limited throughput and chemical mechanical polishing typically require additional polishing tools and a subsequent increase in space for the fabrication line to result in a desired level of throughput.